Computer System Architecture Set 2

Questions 11 to 20

11.	In which type of flip-flop the indeterminate condition of the SR flip-flop (when S=R=1) is eliminated? (a) Edge-triggered flip-flop (b) JK flip-flop (c) D flip-flop (d) T flip-flop (e) Master-slave flipflop.
12.	The bulk of the binary information in a digital computer is stored in memory, but all computations are done in (a) Timing Control (b) Memory Registers (c) Processor Registers (d) Program Control (e) Secondary Memory.
13.	Information transfer from one register to another is designated in symbolic form by means of (a) Control Function (b) Op Code (c) Registers (d) Replacement Operator (e) Arrow Operator.
14.	The registers found in the processor unit are (a) Operational registers (b) Memory registers (c) Storage registers (d) Binary registers (e) Temporary registers.
15.	Techniques that automatically move program and data blocks into the physical main memory when they are required for execution are called (a) Associative-Mapping techniques (b) Main Memory techniques (c) Virtual Memory techniques (d) Cache Memory techniques (e) Paging techniques.
16.	What digit is added to the Excess-3 code generation? (a) 3 (b) 4 (c) 2 (d) 1 (e) 0.
17.	The processor, ---------- and I/O Devices are interconnected by means of a common bus. (a) Cache Memory (b) Auxiliary Memory (c) Virtual Memory (d) Main Memory (e) Extended Memory.
18.	System Software usually includes a program called a --------, which helps the programmer find errors in a program. (a) Write Buffer (b) Read Buffer (c) Debugger (d) Both (a) and (c) above (e) Both (b) and (c) above.
19.	To convert octal code to binary code which of the following digital functions should be used? (a) Decoder (b) Encoder (c) Multiplexer (d) Demultiplexer (e) Binary adder.
20.	A full-adder is simply a connection of two half-adders joined by (a) AND gate (b) OR gate (c) NAND gate (d) NOR gate (e) XOR gate.

Answers

11.	Answer :       (b) Reason : To SR flip-flop two new connections from Q and Q’ outputs back to original input gates eliminate the indeterminate condition.
12.	Answer :       (c) Reason : The operation part of an instruction code specifies the operation to be performed. This operation must be executed on some data stored in memory and/or processor registers. An instruction code, therefore, must specify not only the operation, but also the register or memory words where the operands are to be found, as well as the register or memory words where the result is to be stored. For this reason, the bulk of binary information in a digital computer is stored in memory, but all computations are done in Processor Registers.
13.	Answer :       (d) Reason : A replacement operator consisting of the information transfer from one register to another, is designated in symbolic form.
14.	Answer :       (a) Reason : Registers found in processor are called operational registers and in memory unit are called storage registers.
15.	Answer :       (c) Reason : A virtual memory system provides a mechanism for translating program-generated addresses into correct main memory locations. This is done dynamically, while programs are being executed in the CPU. The translation or mapping is handled automatically by the hardware by means of a mapping table.
16.	Answer :       (a) Reason : Excess-3code generation takes 3 as excess to the binary code.
17.	Answer :       (a) Reason : The Bus master is allowed to initiate data transfer on the bus.
18.	Answer :       (c) Reason : Debugger is a program, which finds errors in program.
19.	Answer :       (a) Reason : Multiplexer is called as Data Selector in computers where Dynamic memory uses the same address lines for both row and column addressing and a set of multiplexers is used to first select row address and then switch to column address.
20.	Answer :       (b) Reason : A full-adder is simply a connection of two half-adders joined by a OR gate, and other half-adder simplify the AND gate also.

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