Questions 161 to 170
161.

Using Karnaugh map SOP form of the expression
(B + C + D) (B’ + C + D’) (A’ + B + C’ + D’) (A + B’ + E’) (A + B’ + D’) will be
 
The number of input variables which a NOT gate can have is
 
The unique output for a NAND logic gate is a 0
 
The states of a bus may be
 
The binary pattern 101110 is an answer received after adding two numbers in a 6bit two’s complement system. The answer in decimal system is
 
A 4bit ALU which is based on 1’complement arithmetic is used to do the following addition.
1101
+1011
The answer should be:
 
Using Boolean algebra the reduced expression for function AB’C + ABC can be realized by using how many number of gates?
 
RISC stands for
 
A binary system based on Two’s complement arithmetic gives the answer 110010. The decimal equivalent(s) of this answer is
 
Which of the following statement is false?

Answers
161.

Answer : (c)
Reason : Using Karnaugh map SOP form of the expression
(B + C + D) (B’ + C + D’) (A’ + B + C’ + D’) (A + B’ + E’) (A + B’ + D’) will be B’C’D + A’B’C + ABC + BD’E’ + ACD’ + ABD’.

Answer : (a)
Reason : The number of input variables which a NOT gate can have is One.
 
Answer : (b)
Reason : The unique output for a NAND logic gate is a 0 when all the inputs are 1.
 
Answer : (e)
Reason : States of bus may be Logic 0,logic 1 and high impedence
 
Answer : (c)
Reason : The binary pattern 101110 is an answer received after adding two numbers in a 6bit two’s complement system. The answer in decimal system is – 18.
 
Answer : (a)
Reason : The answer results in Range overflow when a 4bit ALU which is based on 1’complement arithmetic is used to the addition 1101 + 1011.
 
Answer : (b)
Reason : The function AB’C + ABC can be realized by using 3 gates.
 
Answer : (a)
Reason : The equivalent binary number of 11.8125_{10} is 1011.1101.
 
Answer : (b)
Reason : The decimal equivalent of 110010 based on Two’s complement arithmetic is –13.
 
Answer : (a)
Reason : Combinational circuits has memory.

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