Computer System Architecture Set 24

Questions 231 to 240



231.
When a large number of registers are included in the CPU, it is most efficient to connect then through a ______.
(a)  ALU                                                                 (b)  Memory Register  (c)  STACK
(d)  QUEUE                                                           (e)  Bus system.
232.
The ROM position of main memory is needed for storing an initial program is called________.
(a)    BOIS                                                              (b)  Bootstrap loader   (c)  Flash
(d)  Complier                                                         (e)  Assembler.
233.
The correspondence between the main memory blocks and those in the cache is specified by a _________.
(a)  Miss penalty                                                   (b)  Replacement algorithms                              (c)  Hit rate
(d)  Page fault                                                       (e)  Mapping functions.
234.
Techniques that automatically move programs and data blocks into the physical memory when they are required for execution are called _______.
(a)  Associative mapping                                    (b)  Main memory                          (c)  Virtual memory
(d)  Cache memory                                              (e)  Logical memory.
235.
Virtual memory is used to increase the apparent size of the _________memory.
(a)  Secondary              (b)  Main                        (c)  Auxiliary                 (d)  Associative             (e)  Cache.
236.
The device that in allowed to initiate data transfer on the bus is called ___________.
(a)  Bus Master                                                     (b)  Bus Arbitration      (c)  Bus cycle               
(d)  Bus request                                                     (e)  Parallel Bus.
237.
The routine executed in response to an interrupt request is called ________routine.
(a)  Sub-routine                                                     (b)  Interrupt acknowledge
(c)  Vectored interrupt (d)  Serial interrupt                       (e)  Interrupt Service.
238.
______ interface is used to connect the processor to I/O devices that require transmission of data one bit at a time.
(a)  Parallel                    (b)  Serial                       (c)  Output                     (d)  Input                       (e)  Bus.
239.
The selected target controller responds by asserting
(a)  DB6                         (b)  SEL                          (c)  DB5                         (d)  DB8                         (e)  BSY.
240.
_____ technique allows the DMA controller to transfer one data word at a time after which must return control of the buses to the CPU.
(a)  Cycle stealing                                                 (b)  Bus stealing                         (c)  Memory stealing
(d)  Burst transfer                                                 (e)  Bus controlling.


Answers



231.
Answer :   (a)
Reason :   Bus system connect different component s whereas ALU performs arithmetic and logical calculations and memory register is for storage purpose.
232.
Answer :   (b)
Reason :   ROM portion of main memory is needed for storing an initial program is called Boot Strap Loader program. It will load operating system files from disk to main memory.
233.
Answer :   (e)
Reason :   The corresponding  between the main memory blocks and those in the cache is specified by a mapping function, because the basic characteristic of cache memory is fast access time. Therefore, very little or no time must be wasted when searching for words in the cache.
234.
Answer :   (c)
Reason :   A virtual memory system provides a mechanism for translating program generated address into correct main memory locations. This is done dynamically, while programs are being executed in the CPU. The translation or mapping is handled automatically by the hardware by means of a mapping table.
235.
Answer :   (b)
Reason :   Virtual memory is used to increase the apparent size of the main memory.
236.
Answer :   (a)
Reason :   The Bus master is allowed to initiate data transfer on the bus.
237.
Answer :   (e)
Reason :   Interrupt service routine  is executed in response to an interrupt  request.
238.
Answer :   (b)
Reason :   Serial interface transfers one bit at a time, whereas others can handle more than one bit.
239.
Answer :   (e)
Reason :   BSY is the selected target controller responds by asserting.
240.
Answer :   (a)
Reason :   Cycle Stealing is the technique allows the DMA controller to transfer 1 data word at a time, after which must return control of the buses to the CPU.

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