Computer System Architecture Set 26

Questions 251 to 260



251.
Specify the expansion for ISZ.
(a)  Invalid to skip if Zero                                   (b)  Increment and set if Zero                           
(c)  Increment and sign if Zero                          (d)  Increment and skip if Zero                         
(e)  Increment and save if Zero.
252.
Only Push and Pop operations are applicable to which one of the following.
(a)  Queue                      (b)  Tree                         (c)  Stack                       (d)  Array                       (e)  Table.
253.
Identify the addressing mode, which has instruction specifying a register which contains the memory address of the operand.
(a)  Register mode                                                (b)  Direct addressing mode                               
(c)  Relative addressing mode                            (d)  Indirect addressing mode                           
(e)  Register indirect mode.
 254.
Specify the Mnemonic SHRA description.
(a)  Arithmetic shift right                                     (b)  Arithmetic shift left                                      
(c)  Logical shift right  (d)  Logical shift left   
(e)  Circular shift right.
255.
Identify the expansion for RISC.
(a)  Reduced Instruction Sign Computers       (b)  Reduced Instruction Set Computers
(c)  Reduced Instruction Set Carry                   (d)  Reduced Invalid Set Computers
(e)  Reset Instruction Set Computers.
256.
What are the states of a bus in a computer system?
(a)  Logic 0,logic 1 and low impedence            (b)  Logic 0,logic -1 and high impedence
(c)  Logic -2,logic -1 and high impedence        (d)  Logic -1,logic 1 and high impedence
(e)  Logic 0,logic 1 and high impedence.
257.
Which one of the following gives the information about, the data used in near future is likely to be in use already?
(a)  Spatial locality                                               (b)  Locality                  (c)  Hit ratio
(d)  Temporal locality                                          (e)  Effective access time.
258.
What is the page replacement algorithm where thee is a replacement of a page ,which will not be used for the longest period of time?
(a)  MFU                        (b)  LRU                         (c)  OPT                          (d)  FIFO                        (e)  LFU.
259.
Which one of the following is supplied by one unit to indicate the other unit when the transfer has to occur?
(a)  Strobe pulse           (b)  Time slice               (c)  Access right            (d)  Logic gate              
(e)  Program.
260.
Specify, what is a Set of Logical Addresses?
(a)  Memory space      (b)  Disk space              (c)  Address space        (d)  Location                 (e)  Pages.


Answers



251.
Answer :   (d)
Reason:    ISZ means increment and skiping zero
252.
Answer :   (c)
Reason:    Stack has Push and POP operations.
253.
Answer :   (e)
Reason:    It is Register indirect mode as the memory address is stored in the register.
254.
Answer :   (a)
Reason:    SHRA discribes Arithmetic Shift Right.
255.
Answer :   (b)
Reason:    RISC stands for Reduced Instruction Set Computers.
256.
Answer :   (e)
Reason:    The status as a bus is Logic 0,logic 1 and high impedence.
257.
Answer :   (d)
Reason:    Temporal Locality specifies the information which will be used in near future is likely to be in use already.
258.
Answer :   (c)
Reason:    OPT is the algorithm where there is a replacement of a page, which will not be used for the longest period of time.
259.
Answer :   (a)
Reason:    Strobe pulse is supplied by one unit to indicate the other unit when the transfer has to occur.
260.
Answer :   (c)
Reason:    A Set of Logical Addresses is called Address spece.

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